Project Description

Develop, implement and experiment a placement algorithm having the following characteristics:                                                                      

Objective	Simulated annealing	Partitioning based
Minimize total wirelength	Yang Zhao	Hui Zhang, Sankalp Kallakuri
Minimize length of  longest interconect wire	Ying Wei, Tao Xian	Yulei Weng
Routability	Everybody	Everybody
Total IC area is fixed	Yang Zhao, Ying Wei	Hui Zhang
Minimize total IC area	Tao Xian	Sankalp Kallakuri, Yulei Weng

Inputs

• circuit netlist, area, timing info about each building block, position of I/O pins on the pad frame
• full custom design style is assumed

• you have to decide the interfacing of your software (input/output files, data formats etc)
• the info that should be produced by unroutable layouts to guide the placement process

Benchmark Examples

"Dragon" Benchmark

MARCO GSRC Benchmark Examples

Layout Synth'92

Layout Synth'90

What to hand in?

A technical report in hard and soft copy must be handed in.

The report will contain following sections:

• Introduction and Problem Statement.
• Related Work.
• Proposed solution to the problem and relevant implementation issues.
• Experimental results.
• Conclusion.
• Bibliography.