ESE566

ESE 566:
Hardware/Software Co-Design
of Embedded Systems
(Graduate course)

Instructor: Alex Doboli, PhD
Time and Place: Monday, Wednesday 3:50PM-5:10PM, Javits 108

Credits: 3 credits

Description:

This course presents state-of-the-art concepts and techniques for design of embedded systems consisting of hardware
and software components. Discussed topics include system specification, architectures for embedded systems, performance
modeling and evaluation, system synthesis and validation. The course is complemented by four mini-projects focused on
designing and implementing various co-design methods.

This course presents state-of-the-art concepts and techniques for design of embedded systems consisting of hardware and software components. Discussed topics include system specification, architectures for embedded systems, performance modeling and evaluation, system synthesis and validation. The course is complemented by four mini-projects focused on designing and implementing various co-design methods.

Goal:

Upon completion of this course, students will possess knowledge about state-of-the-art methodologies and techniques for hardware/software co-design of embedded systems. They will know to (1) develop system-level specifications using well known languages, i.e. VHDL or SystemC, (2) implement algorithms for co-design tasks and (3) integrate the developed algorithms into an overall co-design framework.

Upon completion of this course, students will possess knowledge about state-of-the-art methodologies and techniques for hardware/software co-design of embedded systems. They will know to (1) develop system-level specifications using well known languages, i.e. VHDL or SystemC, (2) implement algorithms for co-design tasks and (3) integrate the developed algorithms into an overall co-design framework.

Prerequisites:

ESE 545 (Computer Architectures), ESE 554 (Computational Models), ESE 333 (Real-Time Operating Systems) or equivalent.

Topics:

Introduction to Co-Design Problem description, goals of co-design, co-design steps, co-design approaches and accomplishments, challenges.

Architectures for Embedded Systems a) Single processor-coprocessor architecture, multiprocessor architectures, IP core based design, reconfigurable systems, platform-based design.
b) Interfacing embedded systems to the external environment: sensors.

System Modeling and Specification a) Models of Computation (Finite State Machines, Extended Finite State Machines, Control/Data Flow Nets, Petri nets, Task graphs, hierarchical models).
b) System Specification Languages (StateCharts, VHDL, SystemC, ESTEREL).
System C page

Performance Modeling a) System-level performance modeling vs. low-level performance modeling.
b) Modeling of execution speed (system latency) and energy consumption for hardware and software. Estimation of memory requirements.

System-Level Synthesis a) Architecture selection.
b) Hardware/software partitioning.Task scheduling (scheduling under data and control dependencies, static and dynamic scheduling, heuristic and exact scheduling algorithms).

Communication synthesis a)Hardware and software interface synthesis.
b) Bus encoding for low power consumption.

Hardware synthesis High-level synthesis: behavioral specification of hardware, module set allocation, resource binding, operation scheduling, controller synthesis.


Introduction to Co-Design	Problem description, goals of co-design, co-design steps, co-design approaches and accomplishments, challenges.
Architectures for Embedded Systems	a) Single processor-coprocessor architecture, multiprocessor architectures, IP core based design, reconfigurable systems, platform-based design. b) Interfacing embedded systems to the external environment: sensors.
System Modeling and Specification	a) Models of Computation (Finite State Machines, Extended Finite State Machines, Control/Data Flow Nets, Petri nets, Task graphs, hierarchical models). b) System Specification Languages (StateCharts, VHDL, SystemC, ESTEREL). System C page
Performance Modeling	a) System-level performance modeling vs. low-level performance modeling. b) Modeling of execution speed (system latency) and energy consumption for hardware and software. Estimation of memory requirements.
System-Level Synthesis	a) Architecture selection. b) Hardware/software partitioning.Task scheduling (scheduling under data and control dependencies, static and dynamic scheduling, heuristic and exact scheduling algorithms).
Communication synthesis	a)Hardware and software interface synthesis. b) Bus encoding for low power consumption.
Hardware synthesis	High-level synthesis: behavioral specification of hardware, module set allocation, resource binding, operation scheduling, controller synthesis.

Projects:

Four projects will complement the material discussed in class. Project includes one report, two modleing and one implementation task. The goals of the reports are to familiarize students with system architectures, specification, and system design using existing co-design methods. The implementation part will require the design and implementation in C++/C of a punctual co-design task i.e. partitioning, scheduling, performance evaluation etc.

Course Schedule

Syllabus

Text Books and other Materials

1. G. De Micheli, R. Ernst, W. Wolf, “Readings in Hardware/Software Co-Design”, Morgan Kaufman, 2002.
2. G. De Micheli, “Synthesis and Optimization of Digital Circuits”, McGraw-Hill, 1994.
3. Other material will be provided in class.

Grading

Final grade = 0.2 * report 1 + 0.2 * report 2 + 0.2 * report 3 + 0.4 * final report