Recommended Papers for the Third Report
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S. Edwards, L. Lavagno, E.A. Lee, and A. Sangiovanni-Vincentelli, "Design
of embedded systems: formal models, validation, and synthesis", Proceedings
of the IEEE, March 1997.
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R. Ernst, "Codesign of Embedded Systems: Status and Trends", IEEE Design
& Test of Computers, June 1998.
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A. Sangiovanni-Vincentelli and G. Marting, "A Vision for Embedded Systems:
Platform-Based Design and Software Methodologies", IEEE Design & Test
of Computers, No. 6, 2001.
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W. Cesario et al, "Component-Based Design Approach for Multicore SoCs",
Proceedings of the Design Automation Conference, 2002.
Hardware/Software Partitioning, Task Scheduling
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J. Henkel et al, "A low power HW/SW Partitioning for core based embedded
systems", Proceedings of DAC, 1999.
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J. M. Chang, M. Pedram, "Codex-dp: Co-design of Communicationg Systems
Using Dynamic Programming", IEEE Transactions on CAD, July 2000.
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Bakshi and D. Gajski, "Partitioning and Pipelining for Performance Constrained
Hardware/Software Systems", IEEE Transactions on VLSI systems, Dec 1999.
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I. Hong, M. Potkonjak, and M.B. Srivastava, "On-line scheduling of hard-real
time tasks on variable voltage processors", Proceedings of ISLPED, 1998.
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N.K. Bhambha et a., "Hybrid Global/Local Search Strategies for Dynamic
Voltage Scaling on Embedded Microprocessors", Proc. CODES, April 2001.
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R. Ernst et al, "Hardware-Software Co-synthesis for Microcontrollers",
IEEE Design & Test of Computers, December 1993.
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R. Gupta et al, "A Cosynthesis Approach to Embedded System Design Automation",
Journal of Design Automation of Embedded Systems, January 1996.
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W. Wolf, "An Architectural Co-synthesis Algorithm for Distributed, Embedded
Computing Systems", June 1997.
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P. Chou et al, "ipChinook: An integrated IP-based Design Framework for
Distributed Embedded Systems", Proceedings of the Design Automation Conference,
1999.
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P. Chou, E. Walkup, G. Borriello. Scheduling for Reactive Real-Time Systems.
IEEE Micro, Vol. 14, No. 4, pp. 37-47, August 1994.
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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli.
Hardware/software codesign of embedded systems IEEE Micro, 14(4):26--36,
August 1994.
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M. Chiodo, D. Engels, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, K.
Suzuki, and A. Sangiovanni-Vincentelli. " A Case Study in Computer-Aided
Co-design of Embedded Controllers", Design Automation for Embedded Systems.
1 (1-2): 51-67, 1996.
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Y. Zhang et al, "Task Scheduling and Voltage Selection for Energy Minimization",
Proceedings of the Design Automation Conference, 2002.
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L. Theiel et al, "A Framework for Evaluation of Design Tradeoffs in Packet
Processing Architectures", Proceedings of the Design Automation Conference,
2002.
Hardware and Software for Embedded Systems
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L. Gauthier, "Automatic Generation and Targeting of Application-Specific
Operating Systems and Embedded Systems Software", IEEE Trans. on CAD, Non.
2001.
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L. Semeria et al, "Synthesis of Hardware Models in C With Pointers and
Complex Data Structures", IEEE Transactions on VLSI, December 2001
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Balarin et al, "Synthesis of software programs for embedded control applications",
IEEE Transactions on CADICS, June 1999, pp. 834-849.
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H. Oh et al, "Efficient Code Synthesis from Extended Dataflow Graphs for
Multimedia Applications", Proc. of the Design Automation Conference, 2002.
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D. Lyonnard et al, "Automatic Generation of Application-Specific Architectures
for Heterogeneous Multiprocessor System-on-Chip", Proceedings of the Design
Automation Conference, 2001.
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P. Petrov et al, "Speeding Up Control Dominated Applications through Microarchitectural
Customization in Embedded Processors", Proceedings of the Design Automation
Conference, 2001.
Memory, Buses and I/O
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P. Petrov et al, "Performance and Power Effectiveness in Embedded Processors
- Customizable Partitioned Caches", IEEE Transactions on CAD, Nov. 2001.
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S. Dutta, W. Wolf and A. Wolfe, "A methodology to evaluate memory architecture
design tradeoffs for video signal processors", IEEE Trans. On Circuits
and Systems for Video Technology, Feb, 1998.
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L. Benini et al, "Architectures and Synthesis Algorithms for Power-Efficient
Bus Interfaces", IEEE Transactions on CAD, September 2000.
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Y. Joo et al, "Energy Exploration and Reduction of SDRAM Memory Systems",
Proceedings of the Design Automation Conference, 2002.
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A. Pinto et al, "Constraint-Driven Communication Synthesis", Proceedings
of the Design Automation Conference, 2002.
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G. Varatkar, "Traffic Analysis for on-chip Networks Design of Multimedia
Applications", Proceedings of the Design Automation Conference, 2002.