A. Doboli, E. Currie, "Introduction to Mixed-Signal Embedded Design", ISBN: 978-0-9814679-0-0, 2008 (available online at www.cypress.com/cua/). Website for the textbook.
D. Van Ess, E. Currie, A. Doboli, "Laboratory Manual for Introduction to Mixed-Signal Embedded Design", ISBN: 978-0-9814679-1-7, 2008 (available online at www.cypress.com/cua/).
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, P. Pop, "Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems", in Design, Automation, and Test in Europe: The Most Influential Papers of 10 Years DATE, edited by Rudy Lauwereins and Jan Madsen, Springer, New York, NY, ISBN 978-1-4020-6487-6, March 2008.
H. Tang, H. Zhang, A. Doboli, "Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications - A Case Study for a Sigma-Delta Analog-Digital Converter", in C. Grimm, editor, "Languages for System Specification and Verification", Kluwer, 2004, pp. 201-216.
A. Doboli, R. Vemuri, "A Decomposition-based Symbolic Analysis Method for Analog Synthesis from Behavioral Specifications", in ``VLSI: Systems on a Chip'', editors: L. M. Silveira, S. Devadas, R. Reis, Kluwer, 1999, pp. 305-317.
M. Wang, V. Subramanian, A. Doboli, D. Pescaru, D. Curiac, C. Istin, "Towards a Model and Specification for Visual Programming of Massively Distributed Embedded Systems", Sensors and Transducers Journal, Vol. 5, March 2009, pp. 69-85.
Y. Wei, A. Doboli, "Reconfigurable DeltaSigma Modulator Topology Design through Hierarchical Mapping and Constraint Transformation", Integration the VLSI Journal, Vol. 42, Issue 2, Feb 2009.
H. Zhang, A. Doboli, "A Scalable Sigma-Space Based Methodology for Modeling Process Parameter Variations in Analog Circuits", Microelectronics Journal, Elsevier, accepted for publication, December 2007.
Y. Wei, A. Doboli, "Structural Macromodeling of Analog Circuits through Model Decoupling and Transformation", IEEE Transactions on CADICS, Vol. 27, No. 4, April 2008.
H. Zhang, S. Doboli, H. Tang, A. Doboli, "Compiled Code Simulation of Analog and Mixed-Signal Systems Using Piecewise Linear Modeling of Nonlinear Parameters", Integration the VLSI Journal, Elsevier, Vol. 40, No. 3, pp. 193-209, 2007.
Y. Wei, H. Tang, A. Doboli, "DATE06: Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator Topologies for Multimode Communication Systems", IEEE Transactions on CADICS, Invited Paper, Vol. 26, No. 3, pp. 480-496, March 2007.
S. Kallakuri, A. Doboli, "Customization of Arbitration Policies and Buffer Space Distribution using Continuous Time Markov Decision Processes", IEEE Transaction on VLSI, Vol. 15, No. 2, February 2007.
S. Kallakuri, A. Doboli, S. Doboli, "Applying Stochastic Modeling to Bus Arbitration for Network-on-Chip Systems", Integration the VLSI Journal, Elsevier, Special issue on System-On-Chip: Design and Test, Vol. 40, Issue 2, pp. 183-191, February 2007.
D. Curiac, C. Volosencu, A. Doboli, O. Dranga, T. Bednarz, "Discovery of Malicious Nodes in Wireless Sensor Networks using Neural Predictors", WSEAS Transactions on Computer Research, ISSN 1991-8755, Issue 1, Vol. 2, pp. 38-43, January 2007.
H. Tang, H. Zhang, A. Doboli, "Refinement based Synthesis of Continuous-Time Analog Filters Through Successive Domain Pruning, Plateau Search and Adaptive Sampling", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 8, pp. 1421-1440, August 2006.
H. Tang, A. Doboli, "High-Level Synthesis of Delta-Sigma Modulators Optimized for Complexity, Sensitivity and Power Consumption", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 3, pp. 597-607, March 2006.
N. Dhanwada, A. Doboli, A. Nunez, R. Vemuri, "Hierarchical Constraint Transformation based on Genetic Optimization for Analog System Synthesis", Integration the VLSI Journal, Elsevier, Vol. 39, No. 3, pp. 267-290, 2006.
N. Thepayasuwan, A. Doboli, "Layout Conscious Approach and Bus Architecture Synthesis for Hardware-Software Co-Design of Systems on Chip Optimized for Speed", IEEE Transactions on VLSI Systems, Vol. 13, No. 5, May 2005, pp. 525-538.
N. Thepayasuwan, A. Doboli, "A Nonlinear Programming based Methodology for Combined Core Placement and Bus Synthesis under Time, Area and Energy Consumption Constraints", Scientific Bulletin of "Politehnica" University, Transactions on Automatic Control and Computer Science, Vol. 49 (63), No. 4, pp. 27-32, 2004.
A. Doboli, N. Dhanwada, A. Nunez, R. Vemuri, "A Library-Based Approach to Synthesis of Analog Systems from VHDL-AMS Specifications", ACM Transactions on Design Automation, Vol. 9, Issue 2, pp. 238-271, April 2004.
N. Thepayasuwan, A. Doboli, "Pruning-based Synthesis of Flat and Hierarchical Bus Architectures for SoC in Deep Submicron Technologies", International Journal on Embedded Computing, Vol. 1, 2004.
A. Doboli, R. Vemuri, "Exploration-Based High-Level Synthesis of Linear Analog Systems Operating at Low/Medium Frequencies", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 22, No. 11 2003, pp. 1556-1568.
A. Doboli, R. Vemuri, "Behavioral Modeling for High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS", IEEE Transactions on CADICS, Vol. 22, No. 11, 2003, pp. 1504-1520.
A. Doboli, R. Vemuri, "A Regularity-based Hierarchical Symbolic Analysis Method for Large-scale Analog Networks", IEEE Transactions on Circuits & Systems II, Vol. 48, No 11, pp. 1054-1067, November 2001.
P. Eles, A. Doboli, P. Pop, Z. Peng, "Scheduling with Buss Access Optimization for Distributed Embedded Systems", IEEE Transactions on VLSI Systems, Vol. 8, No. 5, pp. 472-491, October 2000.
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, "System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search", Design Automation for Embedded Systems, 2, Kluwer Academic Publishers, 1997, pp.5-32.
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, "Post-synthesis back-annotation of timing information in behavioral VHDL", Journal of Systems Architecture, Elsevier, 42, 1996/1997, pp.725-741.
A. Doboli, P. Eles, "Software Generation in a Hardware/Software Co-Synthesis Environment", Scientific Bulletin of "Politehnica" University, Transactions on Automatic Control and Computer Science, Vol. 41 (55), No. 1, 1996.
A. Doboli, "A Formalisation of a VHDL Subset", Scientific Bulletin of ``Politehnica'' University Timisoara, Transactions on Automatic Control and Computer Science, Vol. 39 (53), No. 1, 1994.
Submitted Journal Papers
V. Subramanian, M. Gilberti, A. Doboli, D. Curiac, D. Pescaru, "A Goal-Oriented Programming Model and Middleware Execution Support for Grid Sensor Networks with Reconfigurable Embedded Nodes", IEEE Transactions on Industrial Informatics, submitted, Novemver 2008.
I. Codruta, D. Pescaru, A. Doboli, "Stochastic Model-based Heuristics for Fast Field of View Loss Recovery for Urban Traffic Management Through Networks of Video Cameras", submitted to IEEE Transactions on Intelligent Traffic Systems, June 2009.
Y. Wei, A. Doboli, "Systematic Design of OTA Circuits for Continuous-Time Reconfigurable DeltaSigma Modulators", IEEE Transactions on Circuits & Systems - I, submitted, March 2007.
S. Kallakuri, A. Doboli, S. Doboli, D. Pescaru, "Run Time Design Point Selection and Resource Allocation for Embedded Systems in Time Varying Environments", ACM Transactions on Embedded Systems, submitted, second revision, July 2008.
Y. Zhao, R. Pai, A. Doboli, "A Hierarchical Mixed Integer Nonlinear Programming Based Algorithm for Floorplanning in VLSI Design", Integration the VLSI Journal, submitted.
P. Sun, C. Ferent, M. Gilberti, A. Doboli, "Online AMS Frontend Reconfiguration for Sensor Network Applications", European Conference on Circuit Theory and Design (ECCTD'09), 2009.
P. Sun, Y. Zhao, M. Gilberti, A. Doboli, D. Curiac, D. Pescaru, "Dynamic Reconfiguration of Mixed-Domain Embedded Systems for Applications with Variable Performance Requirements", Adaptive Hardware and Systems (AHS), 2008.
P. Sun, Y. Wei, A. Doboli, "Flexibility-oriented Design Methodology for Reconfigurable Delta Sigma Modulators", Proc. of the Design Automation and Test in Europe Conference (DATE'07), 2007.
Y. Wei, A. Doboli, "Systematic Development of Nonlinear Analog Circuit Macromodels Through Successive Operator Composition and Nonlinear Model Decoupling", Proc. of the Design Automation Conference (DAC), July 2006.
Y. Wei, P. SUN, A. Doboli, "Reconfigurable Switched Capacitor Delta-Sigma Modulator Topology Design", Proc. of the System on Chip Conference (SOCC), 2006.
Y. Wei, H. Tang, A. Doboli, "Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator Topologies for Multimode Communication Systems", Proc. of the Design Automation and Test in Europe Conference (DATE'06), March 2006.
H. Zhang, A. Doboli, " ALAMO: An Improved Sigma-Space Based Methodology for Modeling Process Parameter Variations in Analog Circuits", Proc. of the Design Automation and Test in Europe Conference (DATE'06), March 2006.
Y. Wei, A. Doboli, "Library of Structural Analog Cell Macromodels for Design of Continuous-Time Reconfigurable Delta-Sigma Modulators", Proc. of the International Symposium on Circuits and Systems (ISCAS), May 2006.
Y. Wei, A. Doboli, "Systematic Development of Analog Circuit Structural Macromodels through Behavioral Model Decoupling", Proc. of the Design Automation Conference (DAC), pp. 57-62, 2005.
Y. Weng, A. Doboli, "Digital Cell Macromodel with Regular Substrate Template and EKV based MOSFET Model", Proc. GLS VLSI Conference (GLSVLSI), pp. 172-175, 2005.
H. Tang, H. Zhang, A. Doboli, "Layout Aware Analog Synthesis based on Multi-level Optimization, Performance Model Approximation, and Solution Space Pruning", SINTES12 (International Symposium on System Theory, Automation, Robotics, Computers, Electronics, and Instrumentation), Craiova (Romania), 2005.
H. Tang, A. Doboli, "Parameter Domain Pruning for Improving Convergence of Synthesis Algorithms", International Symposium on Circuits and Systems (ISCAS), Kobe, 2005.
H. Zhang, A. Doboli, "An Explorative Tile-based Tool for Automated Design, Placement and Routing of High Frequency Analog Filters", International Symposium on Circuits and Systems (ISCAS), Kobe, 2005.
H. Tang, A. Doboli, "MINLP Based Topology Synthesis for Delta-Sigma Modulators Optimized for Signal Path Complexity, Sensitivity and Power Consumption", Proc. Design, Automation and Test in Europe Conference (DATE'05), pp. 254-269, 2005.
H. Zhang, A. Doboli, "SystemC Simulation of Continuous-Time Sigma-Delta Analog-Digital Converters in the Presence of Non-linearities", Forum on Specification and Design Languages (FDL'04), Lille, 2004.
H. Zhang, A. Doboli, S. Doboli, "Fast Time-Domain Simulation Through Combined Symbolic Analysis and Piecewise Linear Modeling", Proc. of Behavioral Modeling and Simulation Workshop (BMAS'04), San Jose, 2004.
H. Zhang, A. Doboli, "Fast Time Domain Symbolic Simulation for Synthesis of S-D Analog-Digital Converters", Proc. of International Symposium on Circuits and Systems, Vancouver, 2004.
H. Tang, H. Zhang, A. Doboli, "Towards High-Level Synthesis of Analog and Mixed-Signal Systems from VHDL-AMS Specifications - A Case Study for a Sigma-Delta Analog-Digital Converter", Forum on Specification and Design Languages (FDL'03), Frankfurt, 2003.
S. Doboli, A. Doboli, "Piecewise-Linear Modeling of Analog Circuits using Trained Feed-Forward Neural Networks and Adaptive Clustering of Hidden Neurons", 2003 International Joint Conference on Neural Networks (IJCNN), Portland, 2003.
H. Tang, H. Zhang, A. Doboli, "Synthesis of Continuous-Time Filters and Analog to Digital Converters by Integrated Constraint Transformation, Floorplanning and Routing", Proceedings of the Great Lakes Symposium on VLSI (GLSVLSI), Washington DC, 2003.
H. Tang, H. Zhang, A. Doboli, "Layout-Aware Analog System Synthesis Based on Symbolic Layout Description and Combined Block Parameter Exploration, Placement and Routing",Proc. of the Annual Symposium on VLSI (ISVLSI), Tampa, 2003.
S. Doboli, G. Gothoskar, A. Doboli, "Extraction of Piecewise-Linear Analog Circuit Models from Trained Neural Networks using Hidden Neuron Clustering", Proc. of the Design, Automation and Test in Europe Conference (DATE), Munich, 2003.
S. Doboli, G. Gothoskar, A. Doboli, "Piecewise-Linear Modeling of Analog Circuits Based on Model Extraction from Trained Neural Networks", Behavioral Modeling and Simulation Workshop (BMAS), Santa Rosa, 2002.
H. Tang, A. Doboli, "Layout-Aware Synthesis for Analog Systems Based on Combined Block Sizing, Floorplanning and Global Routing", poster, 2002 ASIC/SOC Conference, September 25-27 2002, Rochester, NY.
H. Tang, A. Doboli, "Employing Layout Templates for Synthesis of Analog Systems", 45th Midwest Symposium on Circuits and Systems, Tulsa, OK, August 6-8 2002.
H. Tang, A. Doboli, ``Layout Aware Synthesis Methodology for Analog Systems Based on Combined Block Sizing, Floorplanning and Global Routing'', International Workshop on Logic and Synthesis (IWLS), New Orleans, 2002.
A. Doboli, R. Vemuri, "A Functional Specification Notation for Co-Design of Mixed Analog-Digital Systems", Proc. of the Design, Automation and Test in Europe Conference, Paris, 2002.
A. Doboli, R. Vemuri, "Fast Evaluation of Digital Switching Noise for Synthesis of Mixed-Signal Applications", International Workshop on Behavioral Modeling and Simulation (BMAS'01), Santa Rosa, 2001.
A. Doboli, R. Vemuri,"Hierarchical Optimzation for Synthesis of Linear Analog Systems", ISCAS'2001, Sydney.
A. Doboli, R. Vemuri, "A Regularity-based Hierarchical Symbolic Analysis Method for Large Analog Networks", Proceedings of Design, Automation and Test in Europe Conference, 2001, Munich.
A. Doboli, N. Dhanwada, R. Vemuri, "A HeuristicTechnique for System-Level Architecture Generation from Signal-Flow Graph Representations of Analog Systems", ISCAS'2000, Geneva.
A. Doboli, R. Vemuri, "Towards a Specification Notation for High-Level Synthesis of Mixed-Signal and Analog Systems", International Workshop on Behavioral Modeling and Simulation (BMAS'00), Orlando, 2000.
S. Ganesan, A. Nunez, N. Dhanwada, A.Doboli, R. Vemuri, "Rapid Prototyping of Mixed Signal Systems from VHDL-AMS", Proceedings of the "IEEE/VIUF International Workshop on Behavioral Modeling and Simulation (BMAS'99)", Orlando, 1999.
A.Doboli, A. Nunez-Aldana, N. Dhanwada, S. Ganesan, R. Vemuri, "Behavioral Synthesis of Analog Systems using Two-Layered Design Space Exploration", Proceedings of the 36th Design Automation Conference, 1999.
A. Nunez-Aldana, N. Dhanwada, A. Doboli, S. Ganesan, R. Vemuri, "A Methodology for Behavioral Synthesis of Analog Systems", Proceedings of the 1999 Southwest Symposium on Mixed-Signal Design, IEEE CS Press, 1999.
A.Doboli, R. Vemuri, "A VHDL-AMS Compiler and Architecture Generator for Behavioral Synthesis of Analog Systems", Proceedings of Design, Automation, Test in Europe Conference, 1999 Conference, IEEE CS Press, 1999 (nominated for Best Paper Award).
A.Doboli, R. Vemuri, "The Definition of a VHDL-AMS Subset for Behavioral Synthesis of Analog Systems", Proceedings of the IEEE/VIUF International Workshop on Behavioral Modeling and Simulation (BMAS'98), Orlando, 1998.
A. Nunez-Aldana, A. Doboli, R. Vemuri,
"A Top-Down Synthesis Methodology for Behavioral Mixed-Signal Systems Specified in VHDL-AMS",
Proceedings of the Second International Workshop on Design of Mixed-Mode
Integrated Circuits and Applications, Guanajuato, 1998.
C. Ferent, V. Subramanian, M. Gilberti, A. Doboli, "Linear Programming Approach for Performance-Driven Data Aggregation in Networks of Embedded Sensors", Design, Automation and Test in Europe Conference (DATE 2010), Dresden, 2010.
C. Ferent, A. Doboli, "PNETMAP: Virtual Network Implementation on a Partially-known Physical Network", 2nd International Workshop on Dependable Network Computing and Mobile Systems (DNCMS 2009), Niagara Falls, 2009.
M. Wang, A. Doboli, "Location-Aware, Flexible Task Management for Collaborating Unmanned Autonomous Vehicles", NASA/ESA Adaptive Hardware and Systems Conference, San Franscisco, 2009.
M. Gilberti, A. Doboli, "Synergistic Reconfiguration of Adaptive Precision Chemical Classifiers", NASA/ESA Adaptive Hardware and Systems Conference, San Franscisco, 2009.
V. Subramanian, A. Doboli, "PNet: A Grid type Sensor Network of Reconfigurable Nodes", Workshop on Cyber-Physical Systems (WCPS), Montreal, 2009.
F. Naghiu, D. Pescaru, G. Magureanu, I. Jian A. Doboli, "Corrections of Sensing Error in Video-Based Traffic Surveillance", Symposium on Computational Intelligence (SACI), 2009.
V. Subramanian, A. Doboli, "Online Adaptation Policy Design for Grid Sensor Networks with Reconfigurable Nodes", Proceedings of Design, Automation and Test in Europe Conferences, April 2009.
C. Istin, D. Pescaru, D. Curiac, H. Ciocarlie, A. Doboli, ``Reliable Field of View Coverage in Video-Camera based Wireless Networks for Traffic Management Applications'', Proc. of IEEE International Symposium on Signal Processing and Information Technology (ISSPIT), Sarajevo, 2008.
M. Wang, Y. Zhao, D. Curiac, D. Pescaru, A. Doboli, "Towards a Model and Specification for Visual Programming of Massively Distributed Embedded Systems", Proc. of IEEE International Workshop on Robotic and Sensors Environments (ROSE), Ottawa, 2008.
D. Curiac, C. Volosencu, D. Pescaru, A. Doboli, ``Using Wireless Sensor-Controller Networks for Distributed Control in High Reliability Applications'', IEEE International Conference on Computer Communication and Networks (ICCCN), Sensor Networks Workshop, 2008.
C. Istin, D. Pescaru, A. Doboli, "Impact of Coverage Preservation Techniques on Prolonging the Network Lifetime in Traffic Surveillance Applications", IEEE Intelligent Computer Communication and Processing, 2008.
C. Istin, D. Pescaru, A. Doboli, "Energy Saving Strategy for Video-based Sensor Networks under Field Coverage Preservation", 2008 IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (AQTR), May 2008.
C. Volosencu, D. Curiac, O. Banias, C. Ferent, D. Pescaru, A. Doboli, "Hierarchical Approach for Lighting Control in Future Urban Environments", 2008 IEEE-TTTC International Conference on Automation, Quality and Testing, Robotics (AQTR), May 2008.
R. Yarden, C. Surage, K. Il Chong, A. Doboli, E. Voisan, C. Mocanu, "Tuki: A Voice Activated Information Browser", IEEE LISAT Conference, Farmingdale, NY 2009.
M. Gilberti, A. Doboli, ``Collaborative Reconfigurable Computing Blocks for Classification and High-Level Decision Making'', International Symposium on Spectral Sensing Research (ISSSR), 2008.
M. Gilberti, A. Doboli, "Adaptive Precision Neural Networks for Image Classification", Adaptive Hardware and Systems Conference (AHS), 2008.
M. Wang, A. Doboli, T. Robertazzi, S. Doboli, D. Curiac, "Towards Scallable Distributed Control of Unmanned Autonomous Vehicles", International Symposium on Applied Computational Intelligence and Informatics (SACI'2007), 2007.
S. Kallakuri, A. Doboli, S. Doboli, D. Pescaru, "SoC Design Point Selection and Dynamic Adaptation under Continuously Varying Throughput Constraints", NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2007), 2007.
S. Kallakuri, A. Doboli, "Energy Conscious Online Architecture Adaptation for Varying Latency Constraints in Sensor Network Applications", International Symposium on System Systems and CODES (ISSS+CODES), New York, 2005.
S. Kallakuri, N. Thepayasuwan, A. Doboli, "Communication Subsystem Synthesis and Analysis Tool Using Bus Architecture Generation and Stochastic Arbitration Policies", International Symposium on Circuits and Systems (ISCAS), Kobe, 2005.
S. Kallakuri, N. Thepeyasuwan, A. Doboli, E. Feinberg, "A Continuous Time Markov Decision Process based On-Chip Buffer Allocation Methodology", GLS VLSI Conference (GLSVLSI), April 2005.
S. Kallakuri, A. Doboli, "Buffer Insertion for Bridges and Optimal Buffer Sizing for Communication Sub-System of Systems on Chip", Proc. Design, Automation and Test in Europe Conference (DATE'05), Munich, 2005.
Y. Weng, A. Doboli, ``Smart Sensor Architecture Customized for Image Processing Applications'', Proc. 10th IEEE Real-Time and Embedded Technology and Applications Symposium, pp. 396-403, 2004.
Y. Weng, S. Kallakuri, A. Liang, A. Doboli, S. Hong, T. Robertazzi, S. Doboli, ``Dynamic Architecture Adaptation to Improve Scalability of Sensor Networks: A Case Study for a Smart Sensor for Face Recognition'', Work in Progress Section, Real Time System Symposium (RTSS), 2004, Lisbon.
N. Thepayasuwan, A. Doboli, ``Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip'', Design, Automation and Test in Europe Conference (DATE) 2004, Paris.
S. Kallakuri, A. Doboli, S. Doboli, "Stochastic Modeling Based Environment for Synthesis and Comparison of Bus Arbitration Policies", Proc. of the International Symposium on VLSI (ISVLSI), pp. 199-206, 2004.
N. Thepayasuwan, A. Doboli, "A Nonlinear Programming-based Methodology for Combined Core Placement and Bus Synthesis under Time, Area and Energy Consumption Constraints", Conference on Technical Informatics, Timisoara, May 25-27 2004.
N. Thepayasuwan, A. Doboli, "Hardware-Software Co-Design of Resource Constrained Systems on a Chip in Deep Submicron Technology", International Workshop on Embedded Computing Systems (ECS-04), pp. 818-823, 2004.
N. Thepayasuwan, A. Doboli, "OSIRIS: Automated Synthesis of Flat and Hierarchical Bus Architectures for Deep Submicron Systems-on-Chip", International Symposium on VLSI (ISVLSI), 2004.
N. Thepayasuwan, V. Damle, A. Doboli, ``Bus Architecture Synthesis for Hardware-Software Co-Design for Deep Submicron Systems on Chip'', International Conference on Computer Design (ICCD) 2003, San Jose CA.
S. Kallakuri, A. Doboli, S. Doboli, ``Applying Stochastic Modeling to Bus Arbitration for Network-on-Chip Systems'', Proc. of the 2003 International Conference on VLSI, Las Vegas, 2003.
V. Damle, A. Doboli, ``Pattern-Based Pin-to-Pin Routing for High Speed Digital Circuits in Deep Submicron Technologies'', accepted for the Southwest Symposium on Mixed Signal Design (SSMSD), Las Vegas, 2003.
N. Thepayasuwan, A. Doboli, ``A Methodology for Core Placement and Bus Synthesis under Time, Area and Energy Consumption Constraints'', International Workshop on Logic and Synthesis, New Orleans, 2002.
A. Doboli, "Integrated Hardware-Software Co-Synthesis and High-Level Synthesis for Design of Embedded Systems under Power and Latency Constraints", Proceedings of the Design, Automation and Test in Europe Conference, 2001, Munich.
A. Doboli, P. Eles, "Scheduling under Control Dependencies for Heterogeneous Architectures" , Proceedings of the ICCD'98, IEEE CS Press,1998.
A. Doboli, P. Eles, "Scheduling of Partitioned Specifications for Hardware/Software Co-Synthesis of Multiprocessor Architectures", Proceedings of the International Conference on Technical Informatics (ConTi'98), Timisoara,1998.
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, P. Pop, "Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems", Proceedings of EuroMicro Conference, IEEE CS Press, 1998.
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, P. Pop, "Scheduling of Conditional Process Graphs for the Synthesis of Embedded Systems", Proceedings of DATE'98 Conference, IEEE CS Press, 1998.
P. Eles, Z. Peng, K. Kuchcinski, A. Doboli, "Hardware/Software Partitioning with Iterative Improvment Heuristics", Proceedings of ISSS'96, IEEE CS Press, 1996.
P. Eles, Z. Peng, K. Kuchcinski, A. Doboli, "Hardware/Software Partitioning of VHDL System Specification", Proceedings of EuroDAC/EuroVHDL'96, Geneva, IEEE CS Press, 1996.
P. Eles, Z. Peng, A. Doboli,
"VHDL System - Level Specification and Partitioning in a Hardware/Software Co-Synthesis Environment",
Proceedings of 3rd International Workshop on Hardware/Software Codesign,
Grenoble, IEEE CS Press, 1994.
Y. Zhao, A. Doboli, "Finding Broad-Scale Patterns in Large Size Electronic Circuit Netlist", 48th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Cincinnati, August 7-10 2005.
J.-H. Mun, M. Peng, S. Hong, A. Doboli, W. Tang, "Design Study of 2x2 Core Architecture for Matrix Multiplications via Programmable Graph Architecture", IEEE Systems on Chip Conference (SOCC), Washington DC, September 2005.
N. Thepayasuwan, A. Doboli,"An Exploration Based Binding and Scheduling Technique for Synthesis of Digital Blocks for Mixed-Signal Applications", Proc. ISCAS 2003, Bangkok.
A. Doboli, R. Vemuri,"Integrated High-Level Synthesis and Power-Net Routing for Digital Design under Switching Noise Constraints", Proceedings of the Design Automation Conference 2001, Las Vegas.
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, "Specification of timing constraints in VHDL for High-Level Synthesis", Proceedings of EuroDAC/EuroVHDL, Brighton, IEEE CS Press, 1995 (nominated for Best Paper).
P. Eles, K. Kuchcinski, Z. Peng, A. Doboli, "Back-Annotation
of VHDL Behavioral Models for Postsynthesis Simulation", Proceedings
of 21th EuroMicro Conference, Como, IEEE CS Press, 1995.
Submitted Conference Papers
Y. Zhao, M. Wang, D. Curiac, A. Doboli, "ILP based Task Assignment and Scheduling for Collaborating Unmanned Autonomous Vehicles", submitted, Jan 2008.
Papers on Education
A. Doboli, S. Doboli, E. Currie, "Preparing Computer Engineers for a Global Economy: A Study on Effective Collaboration Practices in Global Student Teams", Frontiers in Education, Austin, 2009.
A. Doboli, S. Doboli, E. Currie, "Visual Embedded System Programming has Arrived!", Frontiers in Education, Saratoga Springs, 2008.
A. Doboli, E. Currie, P. Kane, D. Van Ess, "New and Innovative Educational Material for Teaching Mixed-Domain Embedded System Design to Undergraduate/Graduate Students", ASEE Annual Conference & Exposition, Pittsburgh, 2008.
Other Papers and Technical Reports
Y. Weng, S. Kallakuri, A. Doboli, "A Case Study for Design of Smart Sensor Architecture", CEWIT 2004 Business Without Boundaries, November 9 2004.
J. Ingenito, R. Lobb, J. Leon, W. Ho, R. Larino, A. Doboli, "Two Embedded Solutions for Aiding On-Campus Navigation for Visually Challenged Students", Conference on Instructional Technologies (CIT), June 1-4 2004.
N. Thepayasuwan, A. Doboli, "Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip", TR-VSD-LAB, State University of New York at Stony Brook, September 2003.
N. Thepayasuwan, A. Doboli, "Hardware-Software Co-Design of Resource Constrained Systems on a Chip in Deep Submicron Technology", TR-VSD-LAB, State University of New York at Stony Brook, June 2003.
H. Tang, P. Karthik, H. Zhang, A. Doboli, "Layout-Aware Analog System Synthesis Based on Symbolic Layout and Combined Block Parameter Exploration, Placement and Global Routing", TR-VSD-LAB, State University of New York at Stony Brook, April 2002.
H. Tang, A. Doboli, "Layout-Aware Synthesis for Analog Systems Based on Combined Block Sizing, Floorplanning and Global Routing", TR-VSD-LAB, State University of New York at Stony Brook, April 2002.
N. Thepayasuwan, V. Damle, A. Doboli, "A Nonlinear Programming-Based Methodology for Combined Core Placement and Bus Synthesis Under Time, Area and Energy Consumption Constraints", TR-VSD-LAB, State University of New York at Stony Brook, April 2002.
A. Doboli, R. Vemuri, "A Binding and Scheduling Technique for Synthesis of Mixed-Signal Applications", TR-DDEL, University of Cincinnati, March 2000.
A. Doboli, R. Vemuri, "Effective Techniques for Exploration-based Synthesis of Analog Systems from High-Level Specifications", TR-DDEL, University of Cincinnati, September 1999.
A. Doboli, N. Dhanwada, R. Vemuri, "An Heuristic Algorithm for System-Level Architecture Generation from Signal-Flow Graph Representations of Analog Systems", TR-DDEL, University of Cincinnati, April 1999.
A. Doboli, R. Vemuri, "aBlox - A Hierarchical Representation for Behavioral Synthesis of Analog Systems from VHDL-AMS", TR-DDEL, University of Cincinnati, April 1998.
Presentations
Poster, Conference on Instructional Technologies, Stony Brook, June 1-4 2004.
Invited talk, IBM, Fishkill, June 1 2004.
Presentation, ISCAS, Vancouver, May 23-29 2004.
Presentation, IEEE Real-Time and Embedded Technology and Applications Symposium, Toronto, May 25-28 2004.
Presentation, Design, Automation and Test in Europe Conference, Paris, February 2004.
Presentation, ISVLSI, Lafayette, February 2004.
Poster, ISVLSI, Lafayette, February 2004.
Presentation, 21st International Conference on Computer Design (ICCD), San Jose, October 13-15 2003.
Talk, Forum on Specification and Design Languages (FDL), Frankfurt, September 2003.
Attendance, Microsoft Embedded Device Conference, Seattle, June 26-27 2003.
Presentation, International Conference on VLSI, Las Vegas, June 2003.
Poster, ISCAS, Bangkok, May 2003.
DARPA Review Meeting, Cincinnati, May 15 2003.
Presentation, Great Lakes Symposium on VLSI (GLSVLSI), Washington D.C., April 27-28 2003.
Poster, Design, Automation and Test in Europe Conference, Munich, March 4-8 2003.
DARPA Review Meeting, Arlington, VA, February 19-20 2003.
Poster, Annual Symposium on VLSI (ISVLSI), Tampa, FL, February 20-21 2003.
Talk, Behavioral Modeling and Simulation Workshop (BMAS), Santa Rosa, CA, October 6-8 2002.
Poster, 2002 ASIC/SOC Conference, Rochester, NY, September 25-27 2002.
DARPA Review Meeting, Rhode Island, August 25-27 2002.
DARPA Review Meeting, Cincinnati, April 18 2002.
presentation, Design, Automation and Test in Europe Conference, March 2002.
DARPA PI Meeting, San Antonio, February 27 2002.
Talk, IBM, Fishkill, January 27 2002.
DARPA Kick-off Meeting, Cincinnati, October 24, 2001.
Behavioral Modeling and Simulation Workshop, Santa Rosa, October 2001.
Meeting of the Center for Design of Analog and Digital IC (CDADIC), July 2001.
Invited talk, University of Cincinnati, June 26, 2001.
Design Automation Conference, Las Vegas, June 2001.
Meeting of the Center for Design of Analog and Digital IC (CDADIC), Seattle, February 2001.