Reconfigurable DS Modulator Topologies for Multimode Communication Systems |

This project has been developing a methodology for designing reconfigurable continuous-time DS modulator topologies. Topologies are optimized for minimizing the complexity of the topologies, maximizing the sharing of circuitry for different modes, maximizing the topology robustness with respect to circuit nonidealities, and minimizing total power consumption.
Reconfigurable multimode ADCs have two main advantages as compared to having a collection of single-mode ADCs:
Reconfigurable ADCs are much more compact. For a large number of modes, there might be no area available for having a separate design for each mode.
Design time, hence cost, is reduced. In reconfigurable ADCs, many blocks are shared between different modes. Thus, there is less circuitry to be designed and layed out.
Reconfigurable ADCs might be used in software controlled reconfigurable communication systems (software radio) that graciously adapt to new communication standards and performance constraints. |

Reconfigurable topology with transconductors and integrating capacitors |

Dynamic range of reconfigurable DS ADC and layout of the OTA |

The methodology is based on the concept of generic topology that expresses all possible signal paths in a reconfigurable topology. We consider the modeling of topologies including four types of nonidealities: - Integrator related - Quantizer related - Feedback DAC related and - Circuit related nonidealities. The methodology sets up a mathematical description of the ADC topology as a set of nonlinear equation (NLP) sets. Equations are solved for finding efficient reconfigurable topologies. Found topologies are then refined using Simulink simulation of models with more detailed nonidealities.
Related Publications Y. Wei, A. Doboli, "Structural Macromodeling of Analog Circuits through Model Decoupling and Transformation", IEEE Transactions on CADICS, Vol. 27, No. 4, April 2008. Y. Wei, A. Doboli, "Reconfigurable DeltaSigma Modulator Topology Design through Hierarchical Mapping and Constraint Transformation", Integration the VLSI Journal, Vol. 42, Issue 2, Feb 2009. |