Homework1 FAQ
Notes for homework1 IRSIM Part
Notes for homework1 HSpice Part
IRSIM Tutorial, IRSIM .sim File Format
HSpice Tutorial at WU, HSpice Tutorial, MWaves Manul at Stanford
Switch Level Models of NOT gate, NAND gate and NOR gate
- NOT/Inverter Gate: Fig 5-1, Textbook Page 180
- NAND Gate: Fig 6-5, Textbook Page 239
- NOR Gate: Fig 6-10, Textbook Page 245
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Gates of MOS transistors
Tips: For PMOS, current flow is from Source to Drain; for NMOS, current flow is from Drain to Source
