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Education
- Stony Brook University, Ph.D., February 2007
- University of Science and Technology of China, B.S.,
July 2002
Affiliation
Research
- Design and modeling of reconfigurable continuous-time
Delta-Sigma modualters for multimode wireless communication systems (UMTS/WCDMA/CDMA/GSM/AMPS)
- Systematic development of structural macromodels for mixed-signal circuits
Publications
Journal papers
- Y. Wei, A. Doboli, "Structural Macromodeling of Analog Circuits through Model Decoupling and Transformation",
IEEE Transactions on CADICS, accepted for publication, September 2007.
- Y. Wei, H. Tang, A. Doboli, "Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator
Topologies for Multimode Communication Systems", Invited Paper, Vol. 26, No. 3, pp. 480-496, March 2007.
Conference papers
- P. Sun, Y. Wei, A. Doboli,"Flexibility-oriented Design Methodology for Reconfigurable Delta Sigma Modulators", Proc. of Design, Automation and
Test in Europe Conference (DATE'07), France, 2007, accepted.
- Y. Wei, P. Sun, A. Doboli, "Systematic Methodology for Reconfigurable
Switched-Capacitor Delta Sigma Modulator Design", IEEE International SOC Conference (SOCC'06), 2006.
- Y. Wei, A. Doboli, "Systematic
Development of Nonlinear Analog Circuit Macromodels through Successive
Operator Composition and Nonlinear Model Decoupling"
, Design Automation Conference (DAC'06), 2006.
- Y. Wei, A. Doboli, "Library of Structural Analog Cell
Macromodels for Design of Continuous-Time Reconfigurable Delta-Sigma Modulators"
, International Symposium on Circuits and Systems (ISCAS'06), 2006.
PhD Forum Presentation
- "Systematic Design of Delta Sigma Modulator and Development of Structural Circuit Marcomodels", Design, Automation and
Test in Europe Conference (DATE'07), Nice, France, 2007.
Teaching
- TA of ESE271 (Electrical Circuit Analysis I), Fall 2006
- TA of ESE355 (VLSI System Design), Spring 2006 Lab Homepage
- TA of ESE314 (Electronics Laboratory B), Fall 2005
- TA of ESE324 (Electronics Laboratory C), Spring 2005
- TA of ESE330 (Integrated Electronics), Fall 2004
- TA of ESE382 (Digital Design using VHDL), Spring 2003
Last Modified by Ying Wei, 9/5/2007
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